How often does the "slow path" actually trigger? With 32 TLB entries covering 128 KB, Intel claimed a 98% hit rate for typical workloads of the era. That sounds impressive, but a 2% miss rate means a page walk every 50 memory accesses -- still quite frequent. So the 386 overlaps page walks with normal instruction execution wherever possible. A dedicated hardware state machine performs each walk:
Author(s): Aojie Li, Han Hu, Tao Guo, Ruochen Sun, Mao Ye, Feng Tian, Yi Liu
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Backpressure: good in theory, broken in practice
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2024年12月23日 星期一 新京报